1. Field of the Invention
The present invention relates to a power supply controller for an RF power amplifier and, more particularly, to a power supply controller for a multi-gain step RF power amplifier.
2. Description of the Related Art
An RF power amplifier is an electronic amplifier that increases the power of an RF signal, commonly before the RF signal is output to an antenna. The increase in power provided by the amplifier is known as the gain of the amplifier, and is defined by the power out PO divided by the power in PI (i.e., PO/PI). Thus, when the output power PO is twice as large as the input power PI, the amplifier has a gain of two.
RF power amplifiers are commonly powered by a single power supply voltage, which has a magnitude defined by the power supply voltage that is required to output an amplified RF signal at the maximum specified power. During normal operation, however, RF power amplifiers typically output the amplified RF signal at less than the maximum specified power for significant periods of time.
When an RF power amplifier outputs the amplified RF signal at less than the maximum specified power, the RF power amplifier typically operates with less efficiency, which wastes power. In a battery-powered device, wasted power shortens the available operating time before fresh or recharged batteries are required.
The efficiency of an RF power amplifier can be improved when the amplifier is operating at less than the maximum specified power, thereby reducing the amount of power consumed, by reducing the power supply voltage that is provided to the RF power amplifier. Thus, to reduce the amount of power consumed by an RF power amplifier, power supply controllers have been developed to change the supply voltage provided to the RF power amplifier based on the output power of the amplified RF signal.
FIG. 1 shows a schematic diagram that illustrates an example of a conventional power circuit 100. As shown in FIG. 1, power circuit 100 includes an RF power amplifier 110 that receives an RF signal RFI, amplifies the RF signal, and outputs an amplified RF signal RFO. In addition, RF amplifier 110 has a power supply input to receive a power supply voltage VCC.
Power circuit 100 also includes a power detector 112 that detects the power of the amplified RF signal RFO output by power amplifier 110, and generates an analog detected power signal DPS in response to the detection. The detected power signal DPS, in turn, varies as the detected power of the amplified RF signal RFO varies.
Thus, as the magnitude of the detected power increases, the magnitude of the detected power signal DPS also increases. Similarly, as the magnitude of the detected power decreases, the magnitude of the detected power signal DPS also decreases. (Power detector 112 can alternately detect the power of the RF signal RFI.)
Power circuit 100 further includes a power supply controller 114 that changes the power supply voltage VCC provided to RF power amplifier 110 based on the detected power signal DPS output by power detector 112 (i.e., the output power of the amplified RF signal RFO or alternately the input power of the RF signal RFI).
Power supply controller 114, in turn, includes an analog-to-digital (A/D) converter 120 that converts the analog detected power signal DPS into a series of detected digital words DDW. In addition, power supply controller 114 includes a memory 130 that has a number of address inputs which are connected to the output of A/D converter 120 to receive the detected digital words DDW. Memory 130 receives each detected digital word DDW as an address to one of a number of storage locations, which each hold a voltage digital word VDW, and outputs the voltage digital word VDW that is associated with the address.
Memory 130 is programmed to store a look up table where the addresses formed by the detected digital words DDW form the inputs to the look up table, and the voltage digital words VDW held in the storage locations associated with the addresses form the outputs from the look up table. Table 1 below illustrates an example of the look up table.
TABLE 1DDWVDW0000 0001 (1 mW)0000 0110 (0.6 V VCC)0000 0010 (2 mW)0000 1000 (0.8 V VCC)0000 0011 (3 mW)0001 0000 (1.0 V VCC)0000 0100 (4 mW)0001 0010 (1.2 V VCC)0100 0101 (5 mW)0001 0100 (1.4 V VCC)0100 0110 (6 mW)0001 0110 (1.6 V VCC)0100 0111 (7 mW)0001 1000 (1.8 V VCC)1000 1000 (8 mW)0010 0000 (2.0 V VCC)
As shown in Table 1, the look up table has a column of detected digital words DDW that extend from a lowest detected digital word DDW to a highest detected digital word DDW, and a column of voltage digital words VDW that are associated with the detected digital words DDW, where each detected digital word DDW has an associated voltage digital word VDW.
As discussed above, each detected digital word DDW is a digitized representation of a detected power level (shown parenthetically in Table 1) of the amplified RF signal RFO or the input RF signal RFI. The voltage digital words VDW, in turn, are representations of the power supply voltage VCC (shown parenthetically in Table 1) to be input to RF power amplifier 110 to improve the efficiency of RF power amplifier 110 at the detected power which, in turn, reduces the power consumed by RF power amplifier 110. (The numbers shown in Table 1 are for purposes of illustration only, and are not intended to represent the values of an actual device.)
If the detected powers of RF power amplifier 110 (which is represented by the detected digital words DDW) are placed on the X-axis of a graph, and the most efficient power supply voltages VCC (which is represented by the voltage digital words VDW) for the detected power are placed on the Y-axis of the graph, the resulting curve plotted on the graph is monotonic because each detected power corresponds with only one power supply voltage VCC.
As additionally shown in FIG. 1, power supply controller 114 includes a digital-to-analog (D/A) converter 132 that converts the voltage digital word VDW output from memory 130 to an analog control voltage VCON. Power supply controller 114 also includes a DC-to-DC converter 134 and a low pass LC filter 136.
DC-to-DC converter 134, such as a current-mode buck converter with synchronous rectification, generates an unfiltered power supply voltage VCU defined by the magnitude of the control voltage VCON. Low pass LC filter 136, in turn, filters the unfiltered power supply voltage VCU to output the power supply voltage VCC to the power supply inputs of RF power amplifier 110.
In operation, the RF signal RFI input to RF power amplifier 110 is amplified by the gain of RF power amplifier 110, and output as amplified RF output signal RFO. The power of the amplified RF output signal RFO is detected by power detector 112, and continuously digitized by A/D converter 120 to generate the series of detected digital word DDW.
Each detected digital word DDW output by A/D converter 120 is used to address the look up table in memory 130. Memory 130 outputs the voltage digital word VDW associated with the detected digital word DDW that was used to address memory 130. For example, referring to Table 1, when the detected digital word DDW represents 1 mW, memory 130 outputs a voltage digital word VDW that represents a power supply voltage VCC of 0.6V.
The voltage digital word VDW output by memory 130 is then converted by D/A converter 132 into an analog voltage that sets the magnitude of the control voltage VCON. DC-to-DC converter 134 responds to the magnitude of the control voltage VCON, and outputs a voltage that, when filtered by low-pass LC filter 136, allows RF power amplifier 110 to output the detected RF power at a better efficiency.
Thus, power detector 112 continuously detects the output power of the amplified RF signal RFO (or the input power of the RF signal RFI) of RF power amplifier 110, and supply voltage controller 114 changes the power supply voltage VCC so that RF power amplifier 110 can output the amplified RF signal RFO at the best efficiency for the detected power, and thereby consume less power.
Another approach to reducing the power consumed by an RF power amplifier is with a multi-gain step RF power amplifier. A multi-gain step RF power amplifier is a well-known RF power amplifier that provides a number of different gains. For example, a multi-gain step RF power amplifier can provide three different gains. A multi-gain step RF power amplifier has a gain selection input that identifies the gain that is to be used. For example, a two line gain selection signal has four logic states (00, 01, 10, 11), and can be used to identify up to four different gains.
A multi-gain step RF power amplifier saves power because the multi-gain step RF power amplifier utilizes less power when less gain is required. For example, when a first gain is selected, the multi-gain step RF power amplifier requires a bias current with a first magnitude. When a second smaller gain is selected, the multi-gain step RF power amplifier requires a bias current with a second magnitude that is smaller than the first magnitude. Thus, whenever a lower gain is selected at the gain select input, the power required to support the selected gain is reduced.
Although the above two approaches to reducing the power consumed by an RF power amplifier work satisfactorily, there is a need for additional approaches to reducing the power consumed by an RF power amplifier.